1. Field of the Invention
The present invention relates to an improvement of a structure of a transfer gate for increasing the transfer efficiency of a signal charge in a solid-state image sensor using a charge transfer device for reading signals.
2. Description of the Prior Art
FIG. 1 is a diagram showing a layout of one pixel of an image sensor employing a Charge Sweep Device (CSD), disclosed in, e.g., Kimata et al., "A 480.times.400 Element Image Sensor with a Charge Sweep Device", ISSCC Digest of Technical Papers, Feb. 1985, pp. 100-101 and in Japan Television Society Technical Report No. TEVS 101-6, ED 841, 1985, by Kimata et al., which teaches that the basic idea of the CSD is that the signal charge from one photodiode is transferred, spread over the vertical charge transfer device and collected by the sweep operation. The publication by Yamawaki et al., "A 1/2 FORMAT COLOR IMAGE SENSOR with 485.times.510 PIXELS", SPSE & IGC Electronic Imaging '85, ADVANCE PRINTING OF PAPER SUMMARIES, Oct. 1985, pp. 91-94, also describes the operation of a CSD.
Both publications describe the operation of FIGS. 6 and 7. FIG. 6 shows a block diagram for a CSD, and FIG. 7 shows a series of operation steps for a CSD. In FIG. 6 the gates of a single row are connected to each other by a vertical scanning line. The transfer gate scanner supplies a single vertical scanning line with a select signal during a horizontal blanking period to read out the signal charge from one photodiode at a time to the CSD channel. The signal charge as read out can be split into a few neighboring potential wells as shown in FIG. 7a,because each potential well, being as small as lithography permits, does not have enough capacity for the full signal charge from the single diode. During the horizontal scanning interval, the large signal charge from several neighboring wells is swept out by the CSD scanner driven by a 4-phase clock pulse, as shown in FIG. 7(b-d), and the signal charge is collected in the storage gate. In the next horizontal blanking period the signal charge is transferred to the horizontal blanking period the signal charge is transferred to the horizontal CCD through the storage control gate as shown in FIG. 7f. Transfer efficiency can be improved by an additional sweep-out operation because any residual charge Q.sub.R caused by incomplete transfer, is added to the main signal charge as shown in FIGS. 7(d-e). The advantage of the aforementioned arrangement is that the channel width of the CSD can be narrowed to a size limited only by lithography techniques without subsequent charge handling capacity degradation.
A solid-image sensor FIG. 1 comprises a photodiode 1 for converting a given optical signal into a signal charge, a transfer gate 4 having a surface channel for selectively reading the signal from the photodiode 1, and a transfer channel 3 composed of a buried channel forming a path for transferring the signal charge from the transfer gate 4. The charge transfer operation of the transfer gate 4 and the transfer channel 3 is controlled according to a voltage level applied from a scanning line 5 to a gate electrode 2 through a contact hole 6. Namely, one pixel in the solid-state image sensor is composed of one photodiode and one gate. The gate electrode 2 applies the same voltage to the transfer channel 3 and the transfer gate 4.
FIG. 2 is a diagram schematically illustrating potential formed on the cross section taken from the line A-A' in FIG. 1, wherein FIG. 2 (a) shows a potential state at the time when a signal charge is stored; and FIG. 2 (bl ) shows a potential state at the time of signal reading. In FIG. 2 (a), region I corresponds to the portion of the photodiode 1, region II corresponds to the portion of the transfer gate, and region III corresponds to the transfer device (CSD) portion. The operation will be hereinafter described with reference to FIGS. 1, 2 (a) and 2 (b).
First, the signal charge storing operation will be described. In this operation, the potential applied to the gate electrode 2 changes repeatedly between the "H" level and the "L" level. Since the transfer gate electrode shares the gate electrode 2 with the CSD gate electrode, the potential of the transfer gate 4 changes between .phi..sub.T (H) and .phi..sub.T (L), and the potential of the CSD gate 3 changes between .phi..sub.C (H) and .phi..sub.C (L), respectively, in response to the potential applied to the gate electrode 2. If the transfer gate 4 operates in the accumulation mode in this period, .phi..sub.T (H) may be equal to .phi..sub.T (L). Now, since the transfer gate 4 is composed of a surface channel and the CSD 3 is composed of a buried channel, the potential well formed in the CSD 3 becomes deeper than that of the transfer gate 4. A potential well formed below the photodiode 1 is deeper than the potential well below the transfer gate 4. Therefore, in this condition, the signal charge Q.sub.sig detected by the photodiode 1 is not transferred but stored in the potential well below the photodiode 1.
Next, the signal-reading operation will be described. In this operation, the potential applied to the gate electrode 2 becomes the "HH" level, which is higher than the "H" level. Accordingly, the potential wells formed below the transfer gate 4 and the CSD 3 become deeper than those in the storing operation shown in FIG. 2 (a), and the signal charge Q.sub.sig stored in the photodiode 1 is read out to the CSD 3. The read signal charge is transferred along the transfer channel of the CSD 3 to be read out.
FIG. 3 is a cross sectional structure diagram taken from the line B-B' in FIG. 1. In FIG. 3, an impurity region 8 of a second conductivity type for forming a buried channel serving as the charge transfer channel is provided on a semiconductor substrate 7 of a first conductivity type. An impurity diffusion layer 9 for cell isolation having high impurity density of the first conductivity type formed, for example, by ion implantation and a cell isolation oxide film 10 formed by, for example the selective oxidation process are provided in order to electrically isolate cells adjacent to one another. As shown in FIG. 3, the impurities from the impurity region 9 for cell isolation having high impurity density diffuse into a channel region 8. In the case of the selective oxidation process, the oxide film 10 for cell isolation is formed after the formation of the impurity region 9. During thermal processing in the formation of the oxide film 10, the impurity diffuses from the impurity region 9 into the transfer channel 8; this may be the reason of the foregoing. In this case, if the channel width of the CSD becomes narrower, the substantial impurity density of the channel 8 decreases under the influence of the impurity region 9, resulting in a phenomenon that the potential well in the transfer channel becomes narrower (so called narrow channel effect).
FIG. 4 schematically illustrates the potential state on the cross section taken along the line C-C' in FIG. 1. In FIG. 4, the region IV represents a transfer channel region connected to the transfer gate. In the region IV, a transfer gate is formed on the one side of the transfer channel (CSD) and the impurity region 9 having high impurity density shown in FIG. 3 is formed on the other side thereof. Therefore, the narrow channel effect in the transfer channel with impurity regions of high impurity density formed on the both sides thereof is stronger than the narrow channel effect in the transfer channel region connected to the transfer gate. Consequently, a potential well is formed in the transfer channel region IV connected to the transfer gate 4, in which the charge Q.sub.B is stored. Therefore, in signal charge transfer operation in the above described structure, the signal charge is transferred with the charge Q.sub.B remaining in the potential well, resulting in incomplete transfer of the charge which decreases the transfer efficiency.
In addition, there is a possibility of noise being produced by the fluctuation of the residual charge Q.sub.B.
With respect to the basic structure and operation of a conventional solid-state image sensor, see, Yamawaki et al., "A 1/2 FORMAT COLOR IMAGE SENSOR with 485.times.510 PIXELS", SPSE & IGC Electronic Imaging '85, ADVANCE PRINTING OF PAPER SUMMARIES, Oct. 1985, pp. 91-94, which discloses a color image sensor using a Charge Sweep Device as a vertical charge transfer device, as well as Kimata et al., "A 480.times.400 Element Image Sensor with a Charge Sweep Device", ISSCC Digest of Technical Papers, Feb., 1985, pp, 100-101, which is referred to with respect to FIG. 1.